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Samsung Electronics Co., Ltd. v. Nvidia Corporation

United States District Court, E.D. Virginia, Richmond Division

July 30, 2015

SAMSUNG ELECTRONICS CO., LTD., et al, Plaintiffs,
v.
NVIDIA CORPORATION, et al, Defendants.

MEMORANDUM OPINION

ROBERT E. PAYNE, Senior District Judge.

This matter is before the Court for claim construction of U.S. Patent Nos. 5, 860, 158 (the "'158 Patent"), 6, 262, 938 (the "'938 Patent"), 6, 287, 902 (the "'902 Patent"), 6, 819, 602 (the "'602 Patent"), 8, 252, 675 (the "'675 Patent"), and 6, 804, 724 (the "'724 Patent'").

BACKGROUND

The Plaintiffs, Samsung Electronics Co., LTD and Samsung Electronics America ("Samsung") assert claims for infringement of the '158 Patent, the '938 Patent, the '902 Patent, the '602 Patent, the '675 Patent, and the '724 Patent (collectively the "Patents-in-Suit") against the Defendants, NVIDIA Corporation ("NVIDIA"), Old Micro Inc. ("Old Micro"), and Velocity Holdings LLC ("Velocity") (collectively, "Defendants"). The Patents-in-Suit relate to a method of building computer chips, systems which control a computer's operations, and a display adaptor linking a computer with an analog display. The parties have offered thirteen claims and one preamble for construction.

DISCUSSION

I. Legal Standard

The purpose of claim construction is to "determin[e] the meaning and scope of the patent claims asserted to be infringed." Markman v. Westview Instruments, Inc., 52 F.3d 967, 976 (Fed. Cir. 1995) (en banc), aff'd, 517 U.S. 370 (1996). The construction of a claim is a question of law. Id.

A term should be construed by the Court whenever there is an actual, legitimate dispute as to the proper scope of the claims. 02 Micro Int'l Ltd. v. Beyond Innovation Tech. Co., 521 F.3d 1351, 1360 (Fed. Cir. 2008). However, "a district court is not obligated to construe terms with ordinary meanings, lest trial courts be inundated with requests to parse the meaning of every word in the asserted claims." Id.

Furthermore, some claim terms will be so simple that "the ordinary meaning of claim language as understood by a person of skill in the art may be readily apparent even to lay judges, and claim construction in such cases involves little more than the application of the widely accepted meaning of commonly understood words." Phillips v. AWH Corp., 415 F.3d 1303, 1314 (Fed. Cir. 2005). And, "a sound claim construction need not always purge every shred of ambiguity. The resolution of some line-drawing problems -especially easy ones... - is properly left to the trier of fact." Acumed LLC v. Stryker Corp., 483 F.3d 800, 806 (Fed. Cir. 2007). As recognized in 02 Micro, "district courts are not (and should not be) required to construe every limitation present in a patent's asserted claims... Claim construction is not an obligatory exercise in redundancy.'" 521 F.3d at 1362 (quoting U.S. Surgical Corp. v. Ethicon, Inc., 103 F.3d 1554, 1568 (Fed. Cir. 1997)).

"Claim terms are generally given their plain and ordinary meanings to one of skill in the art when read in the context of the specification and prosecution history." Hill-Rom Servs, Inc. Stryker Corp, 755 F.3d 1367, 1371 (Fed. Cir. 2014). "There are only two exceptions to this general rule: 1) when a patentee sets out a definition and acts as his own lexicographer, or 2) when the patentee disavows the full scope of the claim term either in the specification or during prosecution." Thorner v. Sony Computer Entm't Am LLC, 669 F.3d 1362, 1365 (Fed. Cir. 2012). "[I]n interpreting an asserted claim, the court should look first to the intrinsic evidence of record, i.e., the patent itself, including the claims, the specification, and, if in evidence, the prosecution history... Such intrinsic evidence is the most significant source of the legally operative meaning of disputed claim language." Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582 (Fed. Cir. 1996). Of these sources, the words of the claim should be the Court's controlling focus. See Phillips, 415 F.3d at 1314; see also Digital Biometrics, Inc. v. Identix, Inc., 149 F.3d 1335, 1344 (Fed. Cir. 1998).

"Where the intrinsic record is ambiguous, and when necessary, [the Court may] rely on extrinsic evidence, which consists of all evidence external to the patent and prosecution history, including expert and inventor testimony, dictionaries, and learned treatises." Power Integrations, Inc. v. Fairchild Semiconductor, Intern., Inc., 711 F.3d 1348, 1360 (Fed. Cir. 2013). Extrinsic evidence, however, may not be used to contract or expand the claim language or the meanings established in the specification. Phillips, 415 F.3d at 1318-19; Vitronics, 90 F.3d at 1584. As explained in Nystrom v. Trex Co.,

[I]n the absence of something in the written description and/or prosecution history to provide explicit or implicit notice to the public - i.e., those of ordinary skill in the art - that the inventor intended a disputed term to cover more than the ordinary and customary meaning revealed by the context of the intrinsic record, it is improper to read the term to encompass a broader definition simply because it may be found in a dictionary, treatise, or other extrinsic source.

424 F.3d 1136, 1145 (Fed. Cir. 2005).

II. Claim Construction

The terms tendered for construction are:

(1) "Depositing a second metal gate electrode layer onto inner sidewalls of the spacers and onto an upper surface of the patterned first metal gate electrode layer, " which appears in the '675 patent;
(2) "Depositing a third metal gate electrode layer onto the second metal gate electrode layer, " which appears in the '675 patent;
(3) "A gate insulating layer, " which appears in the '675 patent;
(4) "Insulating spacer along a sidewall of the [second] patterned conductive layer, " which appears in the '902 patent;
(5) "An insulating layer, " which appears in the '902 patent;
(6) "Forming a trench in said substrate, and wherein said field isolation layer fills said trench, " which appears in the '902 patent;
(7) "Request ID [value], " which appears in the '158 patent;
(8) "Controlling propagation delay time, " which appears in the '602 patent;
(9) "Reference voltage, " which appears in the '602 patent;
(10) "Determined/Determining, " which appears in the '938 patent;
(11) "Shift register for delaying, " which appears in the '938 patent;
(12) "Sending parallel digital video data, " which appears in the '724 patent;
(13) "Means for generating a cable sensing signal to be sent to said first external video port over the digital cable, thereby informing the video controller of the digital cable connection state of said first external port, " which appears in the '724 patent.

Additionally, the parties disagree as to whether the preamble of Claim 19 of the '938 Patent is limiting.

a) '675 Patent

Samsung asserts claims 12, 13, and 14 against Defendants in its Second Amended Complaint. Docket No. 81.

1. "Depositing a second metal gate electrode layer onto inner sidewalls of the spacers and onto an upper surface of the patterned first metal gate electrode layer"

The Defendants' proposed construction is "applying, using conformal (i.e. U-shaped) deposition, one metal gate electrode layer to the inner sidewalls of the spacers and to the upper surface of the patterned first metal gate electrode layer." Samsung's proposed construction is "creating a structure comprising one or more metal sublayers each formed by a deposition process onto inner sidewalls of the spacers and onto an upper surface of the patterned first metal gate electrode layer." The parties' dispute focuses on the whether the second metal gate electrode layer can have more than one layer and whether it must be formed using conformal deposition.

a) Words of the Claim

The term "depositing a second metal gate electrode layer onto inner sidewalls of the spacers and onto an upper surface of the patterned first metal gate electrode layer" appears in claim 6 in the '675 Patent. The language of Claim 6 of the '675 patent describes the following claim:

A method of forming an integrated circuit device, comprising:
...
depositing a second metal gate electrode layer onto inner sidewalls of the spacers and onto an upper surface of the patterned first metal date electrode layer

'675 Patent at 11:39-40, 58-60.

b) Specification and Prosecution History

The '675 Patent specification and figures consistently refer to and show the "second metal gate electrode layer" as a single layer. See, e.g. '675 Patent at Fig. 14, 5:28, 5:37[1]. However, the specification also states that the second metal gate electrode layer "may comprise a titanium nitride layer that is formed by a chemical vapor deposition (CVD) or an atomic layer deposition (ALD)" and that it "may include titanium nitride." Id. at 5:5-8, 2:2-3. The second metal gate electrode layer is also described as "U' shaped" in the specification. Id. at 5:42-44.

Defendants argue that the prosecution history of the '675 patent support a finding that Samsung has disclaimed the use of multiple layers for the second metal gate electrode layer. In a response to the patent examiner's rejection, the '675 applicant attempted to distinguish his invention from the prior art by stating that the prior art lacked a "planar metal buffer gate electrode" and did not disclose "patterning of a first metal gate electrode layer in advance of forming electrically insulating spacers and in advance of removing a dummy gate electrode layer." Docket No. 183-1 at 8. Rather, the prior art "merely illustrate[d] conformal deposition of multiple metal layers in sequence into pre-formed recesses in order to define composite metal gate electrodes." Id. The applicant then went on to state that the prior art was "prone to void formation when used to fabricate relatively narrow gate electrodes associated with highly integrated transistors" and that the "void formation may result from a premature closure of the recess during each conformal metal deposition step." Id. at 8-9.

c) Extrinsic Evidence

The parties do not cite to any extrinsic evidence.

d) Correct Construction

It is unnecessary to resolve Defendants' argument that the patent applicant disclaimed the use of multiple layers during the course of patent prosecution. The claim language plainly states that the second metal gate electrode layer must be deposited "onto an upper surface" of the first metal gate electrode layer. '675 Patent at 11: 58-60. Only one layer can be deposited onto the lower layer's surface. Thus, in order to comply with the claim's plain language, the second metal gate electrode layer can only consist of one layer.

Further, the Defendants have failed to support their argument that the deposition of the second metal gate electrode layer must be done conformally. That language is not found in the intrinsic evidence, and the Defendants have not adequately supported their argument that the claim's "U-shaped" language means "conformal."

Thus, the proper construction of the term "second metal gate electrode layer" is its plain and ordinary meaning. The claim language will be used.

2. "Depositing a third metal gate electrode layer onto the second metal gate electrode layer"

The Defendants' proposed construction is "applying, without using conformal deposition, a metal gate electrode layer to the one conformal metal gate electrode layer." Samsung's proposed construction is "creating a structure comprising one or more metal sublayers each formed by a deposition process onto the second metal gate electrode layer." The parties' dispute focuses on the whether the third metal gate electrode layer can have more than one layer and whether the manner in which it is formed must be non-conformal.

a) Words of the Claim

Claim 6 contains the language to be constructed. The language of Claim 6 of the '675 patent contains the following language:

A method of forming an integrated circuit device, comprising:
...
Depositing a third metal gate electrode layer onto the second metal gate electrode layer to thereby fill a space between the inner sidewalls of the spacers, said second and third metal gate electrode layers comprising different materials.

'675 Patent at 11:39-40; 11:61-12:3.

b) Specification and Prosecution History

The '675 Patent specification and the figures therein consistently refer to and show the "third metal gate electrode layer"[2] as a single layer. See, e.g. 1675 Patent at Fig. 17, 6:4, 6:12. However, the '675 Patent specification states that the third metal gate electrode layer "may comprise at least one of aluminum, tungsten, titanium, and tantalum that is formed by a method such as PVD or CVD." '675 Patent at 5:66-6:1. Further it states that the third metal gate electrode layer "may comprise at least one of aluminum, tungsten, and titanium that are formed by PVD or CVD." Id. at 9:19-24. The CVD deposition process is expressly contemplated for both the second and third metal gate electrode layers. Id. at 9:19-24, 5:5-8.

The Defendants point again to the prosecution history and argue that the deposition must be "non-conformal" because the patent applicant made it clear that he was not using multiple conformal layers which were prone to "void formation."

c) Extrinsic Evidence

At oral argument, Samsung cited to the Thin Film Dictionary to show that "conformal" means a deposition wherein the "thickness remains the same regardless of the underlying geometrical features."

d) Correct Construction

Unlike the language requiring that the second metal gate electrode layer be "deposited onto the surface" of the underlying layer, the '675 Patent states only that the third metal gate electrode layer be "deposit[ed]... onto" the underlying layer. This less-restrictive language, in combination with the "comprising" language of the specification[3], supports the interpretation that the third metal gate electrode layer can consist of multiple sub-layers.

Additionally, the Defendants have failed to prove that the proper construction requires that the third metal gate electrode layer be applied "without using conformal deposition." The claim language does not support such a construction, as it does not limit the manner in which the third metal gate electrode layer can be applied.

Finally, the supposed disclaimer language discussed in the "second metal gate electrode" analysis does not support a finding of a disclaimer in the '975 patent. The Court requires a "clear and unambiguous disavowal of claim scope" in order to impart a limitation from the prosecution history into the language of the claim as a disclaimer. Storage Technology Corp. v. Cisco Systems, Inc., 329 F.3d 823, 833 (Fed. Cir. 2003). The correspondence provided here merely indicates that the patent applicant was distinguishing the prior art based on its absence of a "planar metal buffer gate electrode" and "patterning of a first metal gate electrode layer in advance of forming electrically insulating spacers and in advance of removing a dummy gate electrode." Docket No. 182-1 at 8. Although the applicant did note that the prior art's technique was "prone to void formation", such language does not constitute the type of "clear and unambiguous" language that the law requires for a disclaimer.

Thus, the proper construction is "depositing a third metal gate electrode layer comprised of one or more metal sublayers onto the second metal gate electrode layer."

2. "A gate insulating layer"

The Defendants propose that this term should be given its plain and ordinary meaning. Samsung's proposed construction is "a structure comprising one or more dielectric sublayers." Thus, the parties' dispute focuses on the whether the insulating layer can have more than one layer.

a) Words of the Claim

The term "gate insulating layer" appears in several claims in the '675 Patent. First, the language of Claim 1 of the '675 patent describes the following claim:

A method of forming an insulated-gate transistor, comprising:
...
forming a gate insulating layer on a substrate...

'675 Patent at 10:59-63.

Next, the language of Claim 3 of the '675 patent describes the following claim, which is dependent on Claim 1:

The method of Claim 1, wherein the insulating-gate transistor is a PMOS transistor; and wherein the gate insulating layer comprises hafnium oxide.

'675 Patent at 11:31-33.

Next, Claim 6 of the '675 patent describes the following claim:

A method of forming an integrated circuit device, comprising:
...
forming a gate insulating layer on a substrate...

'675 Patent at 11:39-41.

Finally, Claim 15 of the '675 patent describes the following claim that is also dependent on Claim 6:

The method of claim 6, wherein the gate insulating layer comprises a dielectric material selected from a group consisting of hafnium oxide and tantalum oxide.

'675 Patent at 12:69-61.

a) Specification and Prosecution History

The '675 Patent's specification states that the "gate insulating layer... may comprise at least one of hafnium oxide, tantalum oxide, silicon oxide and other high-k dielectric layer." '675 Patent at 6:13-5. However, the specification and figures do consistently refer to and show the "gate insulating layer" as a single layer. See, e.g. '675 Patent at Fig. 2-17 & 19-37, 3:43, 4:51.

b) Extrinsic Evidence

The parties do not present any extrinsic evidence.

c) Correct Construction

Both the claim language and the specification use the "comprising" language and thus support an interpretation that allows the gate insulating layer to be made up of multiple materials. See '675 Patent at 6:13-5, 11:31-33, and 12:69-61. While Defendants argue that this suggests that these multiple materials could be laid in one single layer in an alloy form, it is also possible that they could be laid sequentially, thus forming multiple layers in the gate insulating layer. Further, although Claim 6 does state that the gate insulating layer is to be formed "on a substrate", such language does not require that each part of the gate insulating layer must touch the substrate - a top layer can be "on" a bottom layer without coming into direct contact with the bottom layer. Thus, the correct construction of this term is "a gate comprising one or more insulating sublayers."

b) '902 Patent

Samsung alleges infringement of claims 1, 3, 4, 5, 6, 7, 9, 10, 15, and 16 in its Second Amended Complaint. Docket No. 81.

1. "Insulating spacer along a sidewall of the [second] patterned conductive layer"

The Defendants' proposed construction is "an insulting spacer, along a sidewall of the [second] patterned conductive layer, that prevents etch damage to the field isolation layer if the contact hole is misaligned." Samsung's proposed construction is "an insulating sidewall spacer adjacent to the [second] patterned conductive layer." The parties' dispute focuses on the whether the insulating spacer must prevent etch damage and whether the phrase "spacer along a sidewall" should be rewritten. At oral argument, Samsung agreed that the claim language "spacer along a sidewall" adequately described the patent and agreed to use the claim language instead of the "spacer adjacent" language proposed in their claim construction briefs. Docket No. 214 at 6:6-7:21. Thus, the only dispute to evaluate at this point is whether the sidewall spacer must prevent etch damage.

a) Words of the Claim

The term "insulating spacer along a sidewall of the [second patterned conductive layer" appears in several claims in the '902 Patent. The term at issue is found in Claims 1, 11, 12, 15, and 18. First, the language of Claim 1 of the '902 patent describes the following claim:

A method for forming a contact hole for a microelectronic structure, said method comprising the steps of:
...
forming an etch inhibiting layer of said field isolation layer adjacent said active region of said substrate, the active region including the first patterned conductive layer wherein said etch inhibiting layer comprises a second patterned conductive layer and an insulating spacer along a sidewall of the second patterned conductive layer, wherein the second pattern conductive layer does not extend over the active region of the substrate, and wherein the ...

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